Compacting circuit responses

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C714S724000, C714S726000, C714S742000, C716S030000

Reexamination Certificate

active

07814383

ABSTRACT:
Circuit responses to a stimulus may be compacted, decreasing the number of pin outs, without increasing the circuit element length, using a compactor. In accordance with one embodiment of the present invention, errors may be detected in scan chains used for integrated circuit testing. The number of outputs applied to output pins or other connectors may be substantially decreased, resulting in cost savings.

REFERENCES:
patent: 4241307 (1980-12-01), Hong
patent: 6763488 (2004-07-01), Whetsel
patent: 6950974 (2005-09-01), Wohl et al.
patent: 7051257 (2006-05-01), Whetsel
patent: 2003/0115521 (2003-06-01), Rajski et al.
patent: 2003/0131298 (2003-07-01), Rajski et al.
patent: 2005/0097419 (2005-05-01), Rajski et al.

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