Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1999-05-03
2000-05-23
Monin, Jr., Donald L.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257361, 257362, H01L 2362
Patent
active
060668792
ABSTRACT:
A device layout is disclosed for an ESD device for protecting NMOS or Drain-Extended (DENMOS) high power transistors where the protection device (an SCR) and the NMOS or DENMOS transistors are integrated saving on silicon real estate. The integration is made possible by adding a p.sup.+ diffusion to the n-well (drain) of a high power NMOS (DENMOS) transistor such that the added p.sup.+ diffusion together with the aforementioned n-well and the p-substrate of the silicon wafer create one of the two transistors of the SCR. A low triggering voltage of the SCR is achieved by having the second parasitic npn transistor of the SCR in parallel with the NMOS (DENMOS) transistor by sharing the n-well (collector/drain), p-substrate (base/channel region), and an adjacent n.sup.+ diffusion (emitter/source) in the p-substrate. A high HBM ESD Passing Voltage is obtained by utilizing the tank oxide method of a DENMOS transistor.
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Lee Jian-Hsing
Liu Kuo-Chio
Ackerman Stephen B.
Monin, Jr. Donald L.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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