Code implantation process

Details Code implantation process Code implantation process

2005-07-12

2005-07-12

Deo, Duy-Vu N. (Department: 1765)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S276000, C438S690000, C257S314000, C257S318000, C257S347000, C257S390000

Reexamination Certificate

active

06916713

ABSTRACT:
The present invention provides a code implantation process for the mask read only memory (MROM). A gate oxide layer and a wordline are formed sequentially over a substrate having a buried bitline, with a cap layer formed on the top of the wordline. A dielectric layer is formed on the substrate that is not covered by the wordline and the cap layer. A resist layer with a line/space pattern is formed on the dielectric layer and the cap layer, while the line/space pattern has a first extending direction different to a second extending direction of the cap layer. After removing the cap layer not covered by the resist layer, a code mask layer is formed over the substrate. An ion implantation step is performed to implant dopants into a predetermined code channel region by using the code mask layer, the dielectric layer and the remained cap layer as a mask.

REFERENCES:
patent: 5498565 (1996-03-01), Gocho et al.
patent: 6355524 (2002-03-01), Tuan et al.
patent: 6580120 (2003-06-01), Haspeslagh
patent: 6587387 (2003-07-01), Fan et al.
patent: 2003/0030074 (2003-02-01), Walker et al.

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