CMOS silicide metal gate integration

Details CMOS silicide metal gate integration CMOS silicide metal gate integration

2006-04-19

2008-08-12

Sarkar, Asok K (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

C257SE27108

Reexamination Certificate

active

07411227

ABSTRACT:
The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.

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