CMOS device with metal and silicide gate electrodes and a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S592000, C438S216000, C438S585000

Reexamination Certificate

active

07153734

ABSTRACT:
A semiconductor device and a method for forming it are described. The semiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate.

REFERENCES:
patent: 6063698 (2000-05-01), Tseng et al.
patent: 6184072 (2001-02-01), Kaushik et al.
patent: 6204103 (2001-03-01), Bai et al.
patent: 6255698 (2001-07-01), Gardner et al.
patent: 6303418 (2001-10-01), Cha et al.
patent: 6365450 (2002-04-01), Kim
patent: 6410376 (2002-06-01), Ng et al.
patent: 6420279 (2002-07-01), Ono et al.
patent: 6475874 (2002-11-01), Xiang et al.
patent: 6475908 (2002-11-01), Lin et al.
patent: 6514828 (2003-02-01), Ahn et al.
patent: 6518154 (2003-02-01), Buynoski et al.
patent: 6544906 (2003-04-01), Rotondaro et al.
patent: 6586288 (2003-07-01), Kim et al.
patent: 6617209 (2003-09-01), Chau et al.
patent: 6617210 (2003-09-01), Chau et al.
patent: 6642094 (2003-11-01), Rotondaro et al.
patent: 6642131 (2003-11-01), Harada
patent: 6645818 (2003-11-01), Sing et al.
patent: 6667246 (2003-12-01), Mitsuhashi et al.
patent: 6770568 (2004-08-01), Brask
patent: 6794306 (2004-09-01), Kim et al.
patent: 6835639 (2004-12-01), Rotondaro et al.
patent: 6841441 (2005-01-01), Ang et al.
patent: 6846734 (2005-01-01), Amos et al.
patent: 6858483 (2005-02-01), Doczy et al.
patent: 2002/0058374 (2002-05-01), Kim et al.
patent: 2002/0197790 (2002-12-01), Kizilyalli et al.
patent: 2003/0032303 (2003-02-01), Yu et al.
patent: 2003/0045080 (2003-03-01), Visokay et al.
patent: 2004/0018681 (2004-01-01), Pham et al.
patent: 2004/0099916 (2004-05-01), Rotondaro et al.
patent: 2005/0139928 (2005-06-01), Kavalieros et al.
patent: 0 899 784 AZ (1999-03-01), None
patent: 1 383 161 (2004-01-01), None
patent: 2 347 789 (2000-09-01), None
patent: 2 358 737 (2001-04-01), None
Polishchuk et al., “Dual Workfunction CMOS Gate Technology Based on Metal Interdiffusion,” www.eesc.berkeley.edu, 1 page.
Doug Barlage et al., “High-Frequency Response of 100nm Integrated CMOS Transistors with High-K Gate Dielectrics”, 2001 IEEE, 4 pages.
Lu et al., “Dual-Metal Gate Technology for Deep-Submicron CMOS Devices”, dated Apr. 29, 2003, 1 page.
Schwantes et al., “Performance Improvement of Metal Gate CMOS Technologies with Gigabit Feature Sizes”, Technical University of Hanburg-Harburg, 5 pages.
Doczy et al., “Integrating N-type and P-type Metal Gate Transistors”, U.S. Appl. No. 10/327,293, filed Dec. 20, 2002.
Brask et al., “A Method of Making Semiconductor Device Having a High-K Gate Dielectric”, U.S. Appl. No. 10/387,303, filed Mar. 11, 2003.
Brask et al., “A Method of Making Semiconductor Device Having a High-K Gate Dielectric”, U.S. Appl. No. 10/391,816, filed Mar. 18, 2003.
Chau et al., “A Method for Making a Semiconductor Device Having a Metal Gate Electrode”, U.S. Appl. No. 10/431,166, filed May 6, 2003.
Brask et al., “A Selective Etch Process for Making a Semiconductor Device Having a High-K Gate Dielectric”, U.S. Appl. No. 10/652,546, filed Aug. 28, 2003.
Brask et al., “A Method for Making a Semiconductor Device Having a High-K Gate Dielectric,” U.S. Appl. No. 10/642,796, filed Aug. 28, 2003.
Brask et al., “Methods and Compositions for Selectively Etching Metal Films and Structures,” U.S. Appl. No. 10/658,225, filed Sep. 8, 2003.
Brask et al., “A Method for Making a Semiconductor Device that Includes a Metal Gate Electrode”, U.S. Appl. No. Unknown, filed Dec. 18, 2003.
Brask et al. “A Method for Making a Semiconductor Device with a Metal Gate Electrode that is Formed on an Annealed High-K Gate Dielectric Layer”, U.S. Appl. No. Unknown, filed Dec. 19, 2003.
PCT Notification of Transmittal of the International Search Report and the Written Opinion of the . . . , dated May 5, 2005, International Application No. PCT/US2004/043656.

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