4. Excavating

Peter Muhmenthaler

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Circuit for compression and storage of circuit diagnosis data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Integrated circuit having a scan register chain

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop
Reexamination Certificate

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Integrated semiconductor memory device capable of switching from

Static information storage and retrieval – Read/write circuit – Testing
Patent

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Integrated semiconductor memory with parallel test capability an

Excavating
Patent

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Profile ID: LFUS-PAI-P-305886

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