Circuit for adjusting voltage level of data output in a semicond

Details Circuit for adjusting voltage level of data output in a semicond Circuit for adjusting voltage level of data output in a semicond

1990-01-29

1991-10-22

Bowler, Alyssa H.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365233, 365193, G11C 700, G11C 11413

Patent

active

050601962

ABSTRACT:
The circuit for adjusting voltage level of data output in a semiconductor memory device, thereby having a high speed in its access time. The improvement comprises a power supply terminal; a ground reference voltage terminal; a data output terminal; a data output driving controller for receiving amplified sensing signals and outputting said signals in response to an enable clock; driving circuitry for outputting data output to the data output terminal in response to the signals outputted from the data output driving controller; control pulse generating circuitry receiving the enable clock, for generating an output data control pulse when the data output is completed by the enable clock; and high-impedance voltage generating circuitry for generating voltage level of high-impedance state in response to the output data control pulse and applying said high-impedance voltage to the data output terminal, whereby the voltage level of the data output terminal is controlled to return unconditionally to the high-impedance voltage level from preceding output voltage level.

REFERENCES:
patent: 4583203 (1986-04-01), Monk
patent: 4797573 (1989-01-01), Ishimoto
patent: 4817055 (1989-03-01), Arakawa et al.
patent: 4893275 (1990-01-01), Tanaka et al.
patent: 4894803 (1990-01-01), Aizaki

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