Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-03-14
2006-03-14
Loke, Steve (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S652000, C438S653000, C257S748000, C257S774000
Reexamination Certificate
active
07012019
ABSTRACT:
A circuit barrier structure of a semiconductor packaging substrate and a method for fabricating the same, forming a metal conductive layer on an insulating layer of the substrate and a patterned resist layer on the metal conductive layer. The patterned resist layer has a plurality of holes to expose predetermined parts of the metal conductive layer. A metal barrier layer is formed on the resist layer and in the holes. A patterned circuit layer is electroplated in the holes of the resist layer after removing the metal barrier layer on the resist layer. The resist layer and the metal conductive layer underneath the resist layer are removed. Another metal barrier layer can be formed on the circuit layer. The patterned circuit layer is covered by the metal barrier layers to prevent damage from etching to the circuit layer and inhibit migration of metal particles in the circuit layer.
REFERENCES:
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patent: 5633189 (1997-05-01), Yen et al.
patent: 5645628 (1997-07-01), Endo et al.
patent: 628998 (1994-05-01), None
Hsu Shih-Ping
Tsai Kun-Chen
Clark & Brody
Gebremariam Samuel A.
Loke Steve
Nixon William F.
Phoenix Precision Technology Corporation
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