Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-11-30
2001-05-22
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S199000, C438S149000, C438S587000
Reexamination Certificate
active
06235569
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor integrated circuits. More particularly, it pertains to the circuit and method for a low voltage, voltage sense amplifier.
BACKGROUND OF THE INVENTION
Integrated circuit technology relies on transistors to formulate vast arrays of functional circuits. The complexity of these circuits require the use of an ever increasing number of linked transistors. As the number of transistors required increases, the surface space on silicon chip/die dwindles. It is desirable then, to construct transistors which occupy less surface area on the silicon chip/die.
Metal-oxide semiconductor field effect transistors (MOS transistors) are prevalent in integrated circuit technology because they generally demand less power than their counterpart, bipolar transistors. Bipolar transistors, on the other hand, also possess certain advantages over MOS transistors, such as speed. Therefore, attempts have been made to combine the technological designs of bipolars and MOS transistors in an effort to maximize the benefits of both transistor types.
Various types of lateral transistors have been historically described and utilized in complementary metal-oxide semiconductor (CMOS) technology. Lateral bipolar transistors have received renewed interest with the advent of bipolar complementary metal-oxide semiconductor (BiCMOS) technologies. Recently the action of newer devices has been described in new terms and a more careful distinction made between the different types of transistor action possible. Both gate-body connected MOS transistors and gated lateral bipolar transistors have been described. The term gate-body connected transistors is used to describe vertical or other device structures where the body of the MOS transistor also serves as the base of a bipolar transistor but each device functions separately as a normal transistor and MOS transistor action is dominant. Applying the gate voltage to the body serves primarily to change the threshold voltage of the MOS transistor.
Other structures are possible where the gate and base are common and the bipolar transistor and MOS transistor are in parallel but the bipolar transistor current is dominant. In a gated lateral transistor, not only the structures but also the operation is merged and most current flows along the surface under the gate in either MOS or bipolar operation. In the case of a gated lateral bipolar transistor, at low gate voltages around threshold (V
t
) they can act as gate-body connected MOS transistors. At higher input voltages, V
t
or more, the bipolar action can dominate and they are more appropriately described as gated lateral bipolar transistors.
Much effort has been placed into the study of these merged transistor structures. Both vertical and lateral structures have been studied. These studies do not look to solutions for conserving precious die space in the fabrication of integrated circuits. Likewise, previous efforts have not been able to maximize low power operation and simultaneously maximize switching speeds. It is desirable then to invent structures, circuits and methods which can accommodate the faster switching speed and low power consumption. Improved configuration of transistor structure should desirably remain fully integrateable with prevalent integrated circuit design.
SUMMARY OF THE INVENTION
The above mentioned problems with memory devices and other problems are addressed by the present invention and will be understood by reading and studying the following specification. A circuit and method is provided which can accord a faster switching speed and low power consumption.
In particular, an illustrative embodiment of the present invention includes a voltage sense amplifier. The voltage sense amplifier circuit includes a pair of cross coupled inverters, wherein each inverter comprises a complementary pair of gate-body transistors. The complementary pair comprises a first channel type transistor and a second channel type transistor. Each gate-body transistor has a body region formed of single crystalline semiconductor material which extends outwardly from a substrate. The body region has an upper surface and opposing sidewalls. A source/emitter region and a collector/drain region is formed within a portion of the upper surface of the body region. A gate is formed above the upper surface of the body region. Conductive sidewall members are disposed adjacent to the opposing sidewalls of the body region. A pair of bit lines are included, each bit line couples to the gates of one of the complementary pair of transistors and to the collector drain regions of the other complementary pair of transistors.
In another embodiment, a method of fabricating a voltage sense amplifier is provided. The method includes forming a pair of cross coupled inverters where each inverter includes a complementary pair of gate-body transistors. The complementary pair includes a first channel type transistor and a second channel type transistor. Forming each gate-body transistor includes forming a body region of single crystalline semiconductor material that extends outwardly from a substrate. The body region has an upper surface and opposing sidewalls. A source/emitter region and a collector drain region are formed within a portion of the upper surface of the body region. A gate is formed above the upper surface of the body region. Conductive sidewall members are formed adjacent to the opposing sidewalls of the body region. A pair of bit lines are formed such that each bit line couples to the gates of one of the complementary pair of transistors and to the collector/drain regions of the other complementary pair of transistors.
In another embodiment, an information handling system is provided. The information handling system includes a central processing unit, a random access memory, and a system bus for communicatively coupling the central processing unit and the random access memory. The information handling system further includes a voltage sense amplifier. The voltage sense amplifier includes the embodiment presented above.
Thus, an improved low voltage, voltage sense amplifier circuit and method for fabricating the same is provided. Embodiments of the present invention capitalize on opposing sidewall structures and adjacent conductive sidewall members to conserve available surface space on the semiconductor chips. Conservation of surface space achieves a higher density of surface structures per chip. The voltage sense amplifier is designed to operate with power supply voltages as low as 0.5 volts and to provide faster switching capability.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrmentalities, procedures, and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 4450048 (1984-05-01), Gaulier
patent: 4521448 (1985-06-01), Sasaki
patent: 4673962 (1987-06-01), Chatterjee et al.
patent: 4922315 (1990-05-01), Vu
patent: 4987089 (1991-01-01), Roberts
patent: 4996574 (1991-02-01), Shirasaki
patent: 5006909 (1991-04-01), Kosa
patent: 5023688 (1991-06-01), Ando et al.
patent: 5097381 (1992-03-01), Vo et al.
patent: 5122848 (1992-06-01), Lee et al.
patent: 5250450 (1993-10-01), Lee et al.
patent: 5315143 (1994-05-01), Tsuji
patent: 5350934 (1994-09-01), Matsuda
patent: 5379255 (1995-01-01), Shah
patent: 5453636 (1995-09-01), Eitan et al.
patent: 5491356 (1996-02-01), Dennison et al.
patent: 5508544 (1996-04-01), Shah
patent: 5528062 (1996-06-01), Hsieh et al.
patent: 5541432 (1996-07-01), Tsuji
patent: 5554870 (1996-09-01), Fitch et al.
patent: 5581104 (1996-12-01), Lowrey et al.
patent: 5585998 (1996-12-01), Kotecki et al.
patent: 5587665 (1996-12-01), Jiang
patent: 5
Forbes Leonard
Noble Wendell P.
Lattin Christopher
Micro)n Technology, Inc.
Niebling John F.
Schwegman Lundberg Woessner & Kluth P.A.
LandOfFree
Circuit and method for low voltage, voltage sense amplifier does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit and method for low voltage, voltage sense amplifier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit and method for low voltage, voltage sense amplifier will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2553917