Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
2000-09-05
2002-02-19
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257S781000, C257S784000
Reexamination Certificate
active
06348740
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a bump structure having dopants therein. More particularly, the present invention relates to the incorporation of dopants into the base material to fabricate the bump structure of a flip chip package.
2. Description of Related Art
In general, the fabrication of integrated circuit (IC) can be divided into three major stages, namely, the silicon wafer manufacturing stage, integrated circuit fabrication stage and integrated circuit packaging stage. The packaging stage is the last stage of semiconductor production. Besides protecting the die, the package serves as a medium for connecting the die with the printed circuit board (PCB) and other electronic devices.
Most electronic products are aiming towards lightweight, slim outline and small size. In other words, semiconductor devices inside these electronic products have to be highly integrated. In view of the trend, high-density packages such as chip scale packages (CSP) and flip chips (FC) are developed. In particular, a flip chip structure is employed in packages requiring a large number of pin connections such as a microprocessor. Because contact points in a flip-chip structure is arranged into an area array, pin density of the package is increased. Other advantages of flip-chip structure includes having self-aligned solder balls and short overall signal transmission paths.
FIGS. 1A and 1B
are schematic cross-sectional views showing the structure of a conventional flip-chip package.
As shown in
FIG. 1A
, a flip-chip package consists of a substrate
102
and a die
106
. Bonding pads
104
that serve as external contact points are formed over the substrate
102
. The die
106
has an active surface
101
. A plurality of bumps
108
is formed on the active surface
101
of the die
106
.
As shown in FIG.
1
B. the bumps
108
on the active surface
101
of the die
106
are aligned with bonding pads
104
on the substrate
102
. In this assembly step, gaps
110
are often formed between some of the bumps and bonding pads
104
. This may be the result of a variation of bump thickness on the die surface
110
, variation of bonding pad thickness or insufficient planarity of the substrate
102
. Even after a solder reflow operation, some of the bumps
108
still may not be able to contact their corresponding bonding pads
104
. Packages with such out-of-contact bump
108
may have to be scrapped leading to yield loss.
To prevent the missing contact in a flip-chip package, presolder material identical to the material forming the bumps is often smeared onto the bonding pads of the substrate prior to bump attachment. However, such method complicates the manufacturing steps and increases cost of production.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to incorporate dopants into a base material to fabricate a bump structure so that difficulties in forming a good electrical contact between the bump and a bonding pad on an uneven substrate surface is minimized.
A second object of the invention is to incorporate dopants into a base material to fabricate the bump structure of a flip chip package so that difficulties in forming a good electrical contact between the bump and a bonding pad on an uneven substrate surface is minimized.
A third object of the invention is to provide a method of improving contact between a bump on a die and a bonding pad on a substrate in a flip chip package. The method includes forming a bump structure using a base material that contains dopants.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a bump structure having dopants therein. The bump structure includes a substrate, a plurality of bonding pads, a die and a plurality of bumps. The substrate has a first surface. The plurality of bonding pads is formed on the first surface of the substrate. The die has an active surface. Each bump at least includes a base material and a plurality of dopants. The bumps are formed on the active surface of the die. The active surface of the die faces the first surface of the substrate. The substrate and the die are aligned such that each bump on the die corresponds with a bonding pad on the substrate. Dopants in the bump structure are made to contact the bonding pads on the substrate.
According to the embodiment of this invention. dopants are added to soldering base material forming the bump structure. By controlling average size of the dopants, gaps between the bumps on the die and the bonding pads on the substrate can be easily eliminated. In other words, planarity of flip chip packages is improved. Just by adding some dopants into the material forming the bump, contact between the bumps and the bonding pads is strengthened. Since no additional step is required, there is no need to reschedule the manufacturing flow. Hence, the method can be implemented to increase yield of flip chip package without incurring additional cost.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5436503 (1995-07-01), Kunitomo et al.
patent: 5461261 (1995-10-01), Nishiguchi
patent: 6005292 (1999-12-01), Roldan et al.
patent: 6153938 (2000-11-01), Kanda et al.
Chiu Shih-Kuang
Mao Kuo-Liang
Suo Chao-Dung
Tsai Ying Chou
Clark Sheila V.
J. C. Patents
Siliconware Precision Industries Co. Ltd.
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