Built-in testing methodology in flash memory

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S185010, C365S185330

Reexamination Certificate

active

07050343

ABSTRACT:
An Electric Wafer Sort (EWS) flow is implemented by expanding the functions of the micro-controller embedded in a FLASH EPROM memory device and of the integrated test structures. Test routines are executed by the onboard micro-controllers (that may be reading either from an embedded ROM or from a GLOBAL CACHE provided) internally without involving any external complex or expensive test equipment to control the test program. The device architecture is transparent from a tester point of view, with a standard interface having a set of defined commands and instructions to be interpreted by the on board microcontroller and internally executed.

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patent: 2001/0019499 (2001-09-01), Ishibashi et al.
patent: 1158010 (1969-07-01), None

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