Built-in self test (BIST) technology for testing field...

Details Built-in self test (BIST) technology for testing field... Built-in self test (BIST) technology for testing field...

2007-11-27

2007-11-27

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S725000, C714S734000

Reexamination Certificate

active

11284455

ABSTRACT:
A Built-in Self Test (BIST) system is provided in a Field Programmable Gate Array (FPGA) that can adjust test signal patterns provided for testing after partial reconfiguration of the FPGA. The BIST system includes a decoder that monitors I/O signals and provides an output indicating when I/O signals change indicating partial reconfiguration has occurred. The decoder output is provided to a BIST test signal generator providing signals to an IP core of the FPGA as well as a BIST comparator for monitoring test results to change test signals depending on the partial configuration mode.

REFERENCES:
patent: 7124338 (2006-10-01), Mark et al.
patent: 7188283 (2007-03-01), Shafer et al.

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