Built-in self-test (BIST) for high performance circuits

Details Built-in self-test (BIST) for high performance circuits Built-in self-test (BIST) for high performance circuits

2007-06-05

2007-06-05

Lamarre, Guy (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S735000

Reexamination Certificate

active

10915981

ABSTRACT:
Test patterns for testing electrical circuits are generated by a MUX having its output operatively coupled to a Scan-In shift register and inputs receiving seed pattern signals, response signal from a response shift register, positive and negative signals from the Scan-In register. A control logic circuit provides control signals that enable the MUX to select appropriate input signals. The circuit arrangement enables relatively few seed patterns to generate relatively large number of test patterns. The seed patterns are a sub-set of a test pattern set preferably generated by software such as the Automatic Test Pattern Generator (ATPG). A method to generate the seed patterns is, also, provided.

REFERENCES:
patent: 4476495 (1984-10-01), Fujisawa et al.
patent: 5726996 (1998-03-01), Chakradhar et al.
patent: 5781718 (1998-07-01), Nguyen
patent: 5961653 (1999-10-01), Kalter et al.
patent: 6041429 (2000-03-01), Koenemann
patent: 6249893 (2001-06-01), Rajsuman et al.
patent: 6415408 (2002-07-01), Rhodes et al.
patent: 6449743 (2002-09-01), Hosokawa
patent: 6480980 (2002-11-01), Koe
patent: 6490711 (2002-12-01), Buckley, Jr.
patent: 6519725 (2003-02-01), Huisman et al.
patent: 2003050394 (2003-06-01), None
J. Savir, et al., “A Multiple Seed Linear Feedback Shift Register”, IEEE 1990 paper 30.1, pp. 657-659.
K. Chakrabarty and S. Swaminathan, “Built-in Self Testing of High-Performance Circuits Using Twisted-Ring Counters”, IEEE 2000, pp. I-72-I-75.
J. Riegler et al. “Method and Apparatus for Testing A VLSI Device”, Sep. 15, 1990, IBM Dossier DE9199900018.

Affiliated with

Also associated with

Rating

Built-in self-test (BIST) for high performance circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Built-in self-test (BIST) for high performance circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Built-in self-test (BIST) for high performance circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3844727