Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1995-12-28
1997-03-04
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
36518911, 365194, 365226, G11C 700
Patent
active
056086776
ABSTRACT:
A voltage boosting circuit for a semiconductor memory device has a clock generator for supplying a chip master clock determining an active state and a stand-by state in respective response to first and second states thereof, for generating a detector control signal a first delay time after the first state of the chip master clock is generated, and for generating a latch control signal a second delay time after the first state of the chip master clock is generated. A boosting voltage detector responds to the detector control signal and the latch control signal to generate a detecting signal indicative of a current state of a boosting voltage potential. First and second boosting voltage generators generate the boosting voltage potential, respectively operating in the stand-by state and active state in accordance with the detecting signal and delayed chip master clock signal.
REFERENCES:
patent: 5010259 (1991-04-01), Inoue et al.
patent: 5153855 (1992-10-01), Konishi
patent: 5247480 (1993-09-01), Itoh et al.
patent: 5550775 (1996-08-01), Abe et al.
Kim Byung-chul
Park Chan-Jong
Yoon Sei-seung
Dinh Son T.
Limberg Allen LeRoy
Nelms David C.
Samsung Electronics Co,. Ltd.
LandOfFree
Boosting voltage circuit used in active cycle of a semiconductor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Boosting voltage circuit used in active cycle of a semiconductor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Boosting voltage circuit used in active cycle of a semiconductor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2152030