Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Patent
1996-07-12
1998-09-08
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
257784, 257781, H01L 2329, H01L 2331, H01L 2702
Patent
active
058048839
ABSTRACT:
A bonding pad in a semiconductor device having at least one slit is provided. In the semiconductor device including a passivation layer covering the bonding pad and metal wiring, at least one slit is formed on the bonding pad for electrically connecting the metal wiring to external leads of the semiconductor device. The slit formed in the bonding pad may be filled with a molding compound to buffer the stresses caused by a wire-bonding process. Hence, stress-induced corrosion may be reduced and PCT reliability may be enhanced.
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John H. Lau, "Thermal Stress And Strain In Microelectronics Packaging", Van Nostrand Reinhold, 1993, pp. 430-434.
Kim Hong-beom
Lee Seong-min
Samsung Electronics Co,. Ltd.
Thomas Tom
Williams Alexander Oscar
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