Bonding method for through-silicon-via based 3D wafer stacking

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S624000, C438S667000, C438S668000

Reexamination Certificate

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08030208

ABSTRACT:
There is described a bonding method for through-silicon-via bonding of a wafer stack in which the wafers are formed with through-silicon-vias and lateral microchannels that are filled with solder. To fill the vias and channels the wafer stack is placed in a soldering chamber and molten solder is drawn through the vias and channels by vacuum. The wafers are held together by layers of adhesive during the assembly of the wafer stack. Means are provided for local reheating of the solder after it has cooled to soften the solder to enable it to be removed from the soldering chamber.

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PCT/CN2008/071203; filed Jun. 5, 2008; Search Report mailed Nov. 27, 2008; 5 pp.
PCT/CN2008/071203; filed Jun. 5, 2008; Written Opinion mailed Nov. 27, 2008; 7 pp.

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