Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2008-06-02
2011-10-04
Picardat, Kevin M (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000, C438S667000, C438S668000
Reexamination Certificate
active
08030208
ABSTRACT:
There is described a bonding method for through-silicon-via bonding of a wafer stack in which the wafers are formed with through-silicon-vias and lateral microchannels that are filled with solder. To fill the vias and channels the wafer stack is placed in a soldering chamber and molten solder is drawn through the vias and channels by vacuum. The wafers are held together by layers of adhesive during the assembly of the wafer stack. Means are provided for local reheating of the solder after it has cooled to soften the solder to enable it to be removed from the soldering chamber.
REFERENCES:
patent: 4897708 (1990-01-01), Clements
patent: 5128831 (1992-07-01), Fox, III et al.
patent: 5270261 (1993-12-01), Bertin et al.
patent: 6448661 (2002-09-01), Kim et al.
patent: 6566232 (2003-05-01), Hara et al.
patent: 6577013 (2003-06-01), Glenn et al.
patent: 6593645 (2003-07-01), Shih et al.
patent: 6706555 (2004-03-01), Brand
patent: 6933172 (2005-08-01), Tomimatsu
patent: 7157787 (2007-01-01), Kim et al.
patent: 7291922 (2007-11-01), Yoshioka et al.
patent: 7749899 (2010-07-01), Clark et al.
patent: 7838967 (2010-11-01), Chen
patent: 2002/0192861 (2002-12-01), Brand
patent: 2006/0038288 (2006-02-01), Yoshioka et al.
patent: 2007/0007641 (2007-01-01), Lee et al.
patent: 2007/0218678 (2007-09-01), Suh et al.
patent: 2008/0029850 (2008-02-01), Hedler et al.
patent: 1893053 (2007-01-01), None
patent: 101038883 (2007-09-01), None
patent: 2002-270714 (2002-09-01), None
patent: 2005-175336 (2005-06-01), None
PCT/CN2008/071203; filed Jun. 5, 2008; Search Report mailed Nov. 27, 2008; 5 pp.
PCT/CN2008/071203; filed Jun. 5, 2008; Written Opinion mailed Nov. 27, 2008; 7 pp.
Chung Chang Hwa
Leung Chi Kuen Vincent
Shi Xunqing
Sun Peng
Hong Kong Applied Science and Technology Research Institute Comp
Picardat Kevin M
Wells St. John P.S.
LandOfFree
Bonding method for through-silicon-via based 3D wafer stacking does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bonding method for through-silicon-via based 3D wafer stacking, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bonding method for through-silicon-via based 3D wafer stacking will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4252724