Static information storage and retrieval – Read/write circuit – Precharge
Patent
1997-07-01
1999-02-23
Dinh, Son T.
Static information storage and retrieval
Read/write circuit
Precharge
36518906, 36518911, G11C 700
Patent
active
058751394
ABSTRACT:
According to the present invention, a bitline precharge circuit for a semiconductor memory device is provided. The semiconductor memory device includes: a plurality of word lines arranged in a row direction; a plurality of bitlines forming a plurality of bitline pairs arranged in a column direction; and a plurality of memory cells connected between each of the plurality of bitline pairs via a plurality of switching elements, the switching elements being controlled by respectively different ones of the word lines. The bitline precharge circuit charges a potential on all of the bitlines to a precharge level which is approximately intermediate between a power supply voltage and a ground voltage before a write operation or a read operation is performed and is characterized by including a write precharge circuit for further varying the potential on the bitlines, which has been charged to the precharge level, by a predetermined level before the write operation is performed.
REFERENCES:
patent: 4933905 (1990-06-01), Ootani
patent: 4985864 (1991-01-01), Price
patent: 5268874 (1993-12-01), Yamauchi
patent: 5467312 (1995-11-01), Albon et al.
Dinh Son T.
Sharp Kabushiki Kaisha
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