Bit line precharge circuit

Details Bit line precharge circuit Bit line precharge circuit

1996-11-13

1998-05-19

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Precharge

3652335, 365154, 365156, G11C 700

Patent

active

057544875

ABSTRACT:
An SRAM, which includes a plurality of bit line pairs, a memory cell connected between each pair of the bit lines, and an address transition detection circuit for detecting transition of the externally applied address signal to generate a detection pulse signal, is provided with an improved bit line precharge circuit requiring only two transistors per bit line pair. The new precharge circuit is controlled by a bit line precharge control signal generator for generating a control signal determined by a ratio of impedances connected between a source voltage and ground voltage.

REFERENCES:
patent: 4996671 (1991-02-01), Suzuki et al.
patent: 5047671 (1991-09-01), Monden
patent: 5091889 (1992-02-01), Hamano et al.
patent: 5199002 (1993-03-01), Ang et al.
patent: 5268874 (1993-12-01), Yamauchi
patent: 5305268 (1994-04-01), McClure

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