Bit line pre-charge circuit of semiconductor memory device

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S190000, C365S202000

Reexamination Certificate

active

06909654

ABSTRACT:
A bit line pre-charge circuit of a semiconductor memory device includes a pre-charge circuit connected between a pair of bit lines for pre-charging the pair of bit lines in response to a pre-charge control signal and a pre-charge voltage transmitting circuit for transmitting a pre-charge voltage to the pre-charge circuit in response to the pre-charge control signal. A voltage drop in a pre-charge voltage generation line may be prevented when a short circuit is formed between a word line and a pair of bit lines, and current consumption during a standby operation of the semiconductor memory device may also be reduced, by preventing current from flowing from the pair of bit lines to the pre-charge voltage generation line.

REFERENCES:
patent: 5499211 (1996-03-01), Kirihata et al.
patent: 5673231 (1997-09-01), Furutani
patent: 6018481 (2000-01-01), Shiratake
patent: 6343038 (2002-01-01), Makino et al.
patent: 6775194 (2004-08-01), Chen

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