Automatic test configuration generation facilitating repair...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07409669

ABSTRACT:
Techniques are provided that control the generation of test routes to improve the ability of a test system to isolate defects on programmable circuits. A test generator creates test routes that test the horizontal resources. In these test routes, the inputs of each circuit element are only connected to other circuit elements in the same row. Test routes are also generated to test the vertical resources. Each of theses test routes is allowed to make only one transition from between two different rows of circuit elements. The configuration generator includes a post processor that ensures all source drivers in the test routes connect to at least two sinks.

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Data Sheet Tetramax ATPG, Automatic Test Pattern Generation, Synopsys, Mountain View, CA, 2001.
Fastscan and the ATPG Product Family, Design-for-Test Datasheet, Mentor Graphics, 2003.

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