Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-03-15
2005-03-15
Torres, Joseph D. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C702S118000, C702S119000, C702S123000
Reexamination Certificate
active
06868513
ABSTRACT:
A method, system and software for automatically generating a test environment for testing a plurality of devices (DUTs) under test in a test system. The multiple devices are tested by mapping the plurality of DUTs into pins of the tester system to create pin data; inputting into a test program generator pattern data, generic test program rules and the pin data; generating a multi-DUT test program and multi-DUT pattern data; and controlling the test system through the test program. The resulting fail data is then logged to each DUT.
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Botala Sally S.
Grosch Dale B.
LaCroix Donald L.
Sprague Douglas E.
Steel Randolph P.
International Business Machines - Corporation
Kotulak Richard M.
Torres Joseph D.
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