Asymmetric source/drain junctions for low power silicon on...

Details Asymmetric source/drain junctions for low power silicon on... Asymmetric source/drain junctions for low power silicon on...

2011-07-12

2011-07-12

Nhu, David (Department: 2895)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S141000, C438S311000, C438S186000, C257SE21051, C257SE21320, C257SE21127, C257SE21147

Reexamination Certificate

active

07977178

ABSTRACT:
A semiconductor device includes a buried insulator layer formed on a bulk substrate; a first type semiconductor material formed on the buried insulator layer, and corresponding to a body region of a field effect transistor (FET); a second type of semiconductor material formed over the buried insulator layer, adjacent opposing sides of the body region, and corresponding to source and drain regions of the FET; the second type of semiconductor material having a different bandgap than the first type of semiconductor material; wherein a source side p
junction of the FET is located substantially within whichever of the first and the second type of semiconductor material having a lower bandgap, and a drain side p
junction of the FET is located substantially entirely within whichever of the first and the second type of semiconductor material having a higher bandgap.

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patent: 2007/0290192 (2007-12-01), Rotondaro

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