Assembly of thin die coreless package

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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Details

C257S718000, C257SE23083, C257SE21505

Reexamination Certificate

active

07666714

ABSTRACT:
In one embodiment, a method comprises coupling a coreless substrate panel to a pressure cover plate of a carrier, applying flux to the coreless substrate panel, placing at least one die on the coreless substrate panel, reflowing solder onto the coreless substrate panel, defluxing the coreless substrate panel, underfilling the coreless substrate panel, and attaching at least one heat spreader to the coreless substrate panel.

REFERENCES:
patent: 4829663 (1989-05-01), Masujima et al.
patent: 5988485 (1999-11-01), Master et al.
patent: 2005/0000634 (2005-01-01), Craig et al.
patent: 2006/0060637 (2006-03-01), Susheel et al.
patent: 2008/0057625 (2008-03-01), Chan et al.

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