Substrate processing system, and method of control therefor,...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Article handling

Reexamination Certificate

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C700S121000, C700S214000

Reexamination Certificate

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07729798

ABSTRACT:
A transfer schedule SA and a transfer schedule SB for an A lot and a B lot different from each other are generated on a transfer control table, the succeeding transfer schedule SB is moved ahead in the direction of a time axis within a range over which it does not interfere with the transfer schedule SA for the preceding A lot to make the start timing for the succeeding transfer schedule SB become earlier than the end timing for the transfer schedule for the preceding A lot, so that the transfer schedule SA and the transfer schedule SB are executed in parallel, thereby improving the throughput a wafer transfer process.

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patent: 6535784 (2003-03-01), Joma et al.
patent: 2001/0048865 (2001-12-01), Tateyama et al.
patent: 08-153765 (1996-06-01), None
patent: 09-181143 (1997-07-01), None
patent: 11-045926 (1999-02-01), None
patent: 2001-345241 (2001-12-01), None
patent: 2002-506285 (2002-02-01), None
patent: WO 99/45575 (1999-09-01), None
Notification of Transmittal of Translation of the International Preliminary Report on Patentability (Form PCT/IB/338)—PCT/JP2004/004383, dated Jan. 2004.
PCT International Preliminary Report on Patentability (Form PCT/IB/409)—PCT/JP2004/004383, dated Jan. 2004.

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