Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-09-04
2007-09-04
Lamarre, Guy (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S744000
Reexamination Certificate
active
11011232
ABSTRACT:
Application specific integrated circuits (ASICs) and methods are provided which allow for internal testing of an ASIC. One ASIC embodiment includes a processor on the ASIC. A memory is coupled to the processor. A test circuit is integrated on the ASIC and coupled to the processor to perform testing internal to the ASIC, the test circuit having an input to receive signals from the processor. The processor can read an output of the test circuit to determine a performance speed of the ASIC.
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Curcio, Jr. Joseph A.
Wickeraad John A.
Hewlett--Packard Development Company, L.P.
Lamarre Guy
Siddiqui Saqib
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