Apparatus and method for reducing leakage current in a dynamic r

Static information storage and retrieval – Systems using particular element – Capacitors

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36518909, 365202, G11C 1124

Patent

active

056732198

ABSTRACT:
In a dynamic random access memory unit, the leakage current from a non-selected charged storage cell capacitor (320-324; 325-329) through the pass transistor (310-314; 315-319) to a zero voltage bitline (31, 32) is reduced by first isolating the bitline pair (31, 32) from the sense amplifier unit (35). The voltage of the zero voltage bitline (31, 32) is then increased so that the bitline (31, 32) is at a slightly higher potential than the gate terminal of the pass transistor (310, 314; 315-319). This voltage difference results in a large reduction of leakage current. In the preferred embodiment, a coupling transistor (304) is positioned between the bitline pair (31, 32). After the bitline pair (31, 32) is isolated from the associated sense amplifier unit 35, a small voltage is applied to the gate terminal of the coupling transistor (304). A small rise in the voltage of the zero voltage bitline (31, 32) results, thereby providing voltage difference between the gate and the source of the pass transistor (310, 314; 315, 319) to reduce the current flow.

REFERENCES:
patent: 4943944 (1990-07-01), Sakui et al.
patent: 5138578 (1992-08-01), Fujii
patent: 5247482 (1993-09-01), Kim
patent: 5414662 (1995-05-01), Foss et al.

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