Programmable address decoder for field programmable memory array

Details Programmable address decoder for field programmable memory array Programmable address decoder for field programmable memory array

1998-11-12

2000-10-10

Hoang, Huan

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518908, 36523002, G11C 800

Patent

active

061308544

ABSTRACT:
A field programmable memory array having a plurality of sub-arrays is provided. Programmable address decoders, programmable hierarchical bit line arrangements, programmable I/O arrangements, among other features, are provided to enable programming of portions of the array into selected modes. The modes may include wide memory, deep memory, FIFO, LIFO, among others. An embodiment of the invention is disclosed wherein the field programmable memory array is integrated with the programmable resources of a field programmable gate array.

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