Apparatus and method for manufacturing a semiconductor wafer...

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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C438S401000

Reexamination Certificate

active

11495057

ABSTRACT:
A multi-layered semiconductor structure with free areas limiting the placement of test keys. First and second scribe lines intersect to define one corner point of a die. The first and second scribe lines are part of the multilayered structure and at least one layer of the multi-layer structure is a low-k dielectric layer. Free area A1is defined on the first scribe line and is defined by the equation A1=D1×S1, where D1is the distance from the corner point of the die toward the main area of the die, and S1is the width of the first scribe line. Free area ASis defined at the intersection of the first scribe line and the second scribe line adjacent the die and is defined by the equation AS=S1×S2, where S2is the width of the second scribe line.

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Pidin, S., et al., “MOSFET Current Drive Optimization Using Silicon Nitride Capping Layer for 65-nm Technology Node,” 2004 Symposium on VLSI Technology Digest of Technical Papers, pp. 54-55.

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