Apparatus and method for device selective scans in data...

Details Apparatus and method for device selective scans in data... Apparatus and method for device selective scans in data...

2002-08-05

2008-12-09

Ton, David (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S729000

Reexamination Certificate

active

07464311

ABSTRACT:
In a multi processor environment wherein the processors are capable of implementing a streaming data mode of operation, a technique is provided that reduces the number of bits shifted through the scan chain necessary to select a processor for operating in the streaming data mode. All test control device associated with the processor have an instruction entered therein. After execution of the instruction, all of the processors are entered in a bypass mode of operation. Then, a logic “0” in the bypass register will cause the associated target processor to enter the streaming data mode, while a logic “1” in the bypass register will cause the processor to enter the bypass mode. To select a new target processor, logic “1”s in the bypass register will reset the test control unit and thereafter the entry of a logic “1” will cause the non-target processors to enter the bypass mode, while a logic “0” in a bypass register will select the new target processor (i.e., for operating in the streaming data mode).

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patent: 6055649 (2000-04-01), Deao et al.
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