Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-17
2007-07-17
Ton, David (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S785000
Reexamination Certificate
active
11093244
ABSTRACT:
A computer calculates bit patterns of syndromes for all candidate bit patterns of reception words that are input in ECC-EOR circuits of a logic circuit. The bit patterns of the syndromes are stored as possible bit patterns. Request bit patterns are propagated when an error occurs, and are allocated to the syndromes. Implication processing is performed, and the request bit patterns are compared with the possible bit patterns.
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Fujitsu Limited
Ton David
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