Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2011-04-19
2011-04-19
Smith, Bradley K (Department: 2894)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S131000, C438S467000, C257S530000, C257SE23147, C257SE21476, C257SE21576
Reexamination Certificate
active
07927995
ABSTRACT:
An anti-fuse structure that included a buried electrically conductive, e.g., metallic layer as an anti-fuse material as well as a method of forming such an anti-fuse structure are provided. According to the present invention, the inventive anti-fuse structure comprises regions of leaky dielectric between interconnects. The resistance between these original interconnects starts decreasing when two adjacent interconnects are biased and causes a time-dependent dielectric breakdown, TDDB, phenomenon to occur. Decreasing of the resistance between adjacent interconnects can also be expedited via increasing the local temperature.
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U.S. Office Action dated Jan. 28, 2010.
Office Action received in the parent U.S. Patent Application, namely U.S. Appl. No. 12/144,229.
United States Office Action dated Dec. 27, 2010, received in related U.S. Appl. No. 12/144,229.
Clevenger Lawrence A.
Dalton Timothy J.
Fuller Nicholas C.
Hsu Louis C.
Yang Chih-Chao
International Business Machines - Corporation
Karimy Mohammad T
Percello, Esq. Louis J.
Scully , Scott, Murphy & Presser, P.C.
Smith Bradley K
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