Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-07-11
1999-08-17
Wojciechowicz, Edward
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257357, 257360, 257371, H01L 2972
Patent
active
059397560
ABSTRACT:
An apparatus and method are disclosed for enhancing the operation of ESD protective circuits in a VLSI chip with a plurality of parallel CMOS devices therein, particularly a plurality of NMOS devices arranged as parallel N-P-N bipolars. In the MOSFET circuits, a number of sets of cooperating N+ regions are deposited in a P-well in a P-type substrate to form, with electrodes and connections, a set of parallel source-base-drain transistors. The ESD pass voltage is effected by different processes due to the current-crowding effect. The current distribution in each of the N-P-N bipolars is strongly dependent on the P-well resistivity so that to reduce the current crowding effect and render the current distribution uniform in each parallel N-P-N bipolar, an additional P-well implantation is used to reduce the P-well resistivity in the input, I/O, and output buffer ESD protection circuits. Accordingly, the effective protection width will be increased and the ESD performance is improved.
REFERENCES:
patent: 5872379 (1999-02-01), Lee
Taiwan Semiconductor Manufacturing Co. Ltd.
Wojciechowicz Edward
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