Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2006-02-14
2006-02-14
Gurley, Lynne A. (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S423000, C438S471000, C438S966000
Reexamination Certificate
active
06998353
ABSTRACT:
The present invention provides methods and system for forming a buried oxide layer (BOX) region in a semiconductor substrate, such as, a silicon wafer. In one aspect, in a method of the invention, an initial dose of oxygen ions is implanted in the substrate while maintaining the substrate temperature in a range of about 300° C. to 600° C. Subsequently, a second dose of oxygen ions is implanted in the substrate while actively cooling the substrate to maintain the substrate temperature in range of about 50° C. to 150° C. These ion implantation steps are followed by an annealing step in an oxygen containing atmosphere to form a continuous BOX region in the substrate. In one preferred embodiment, the initial ion implantation step is performed in a chamber that includes a device for heating the substrate while the second ion implantation step is performed in a separate chamber that is equipped with a device for actively cooling the substrate. The annealing step can be performed in a third chamber or in either of the first or second chambers.
REFERENCES:
patent: 4139051 (1979-02-01), Jones et al.
patent: 4693777 (1987-09-01), Hazano et al.
patent: 4786608 (1988-11-01), Griffith
patent: 4938992 (1990-07-01), Mears
patent: 5053627 (1991-10-01), Ruffell et al.
patent: 5131460 (1992-07-01), Krueger
patent: 5244820 (1993-09-01), Kamata et al.
patent: 5822172 (1998-10-01), White
patent: 6043166 (2000-03-01), Roitman et al.
patent: 6141203 (2000-10-01), Sherman
patent: 6153524 (2000-11-01), Henley et al.
patent: 6784072 (2004-08-01), Fox et al.
patent: 6794264 (2004-09-01), Dolan et al.
patent: 2002/0123211 (2002-09-01), Dolan et al.
patent: 2002/0173123 (2002-11-01), Fogel et al.
patent: 2003/0036289 (2003-02-01), Kawamura et al.
patent: 2004/0013886 (2004-01-01), Fox et al.
patent: 2005/0003626 (2005-01-01), Fox et al.
patent: 2005/0130394 (2005-06-01), Falster
patent: 0 225 717 (1987-06-01), None
patent: 0 607 043 (1996-03-01), None
patent: 0 926 725 (1999-06-01), None
Ion Implantation—Science and Technology. Ed. Ziegler. Chapter 10: “Wafer Cooling and Wafer Charging in Ion Implantation” by M.E. Mack (Ion Implantation Technology Co. Yorktown, 1996).
“The Role of Implant Temperature in the Formation of Then Buried Oxide Layers,” by White, et al.
Blake Julian G.
Erokhin Yuri
Engellenner Thomas J.
Gurley Lynne A.
Ibis Technology Corporation
Isaac Stanetta
Mollaaghababa Reza
LandOfFree
Active wafer cooling during damage engineering implant to... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Active wafer cooling during damage engineering implant to..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Active wafer cooling during damage engineering implant to... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3650727