Chronic interline phase error from an image scanner generating p

Circuit arrangement for an electronic d.c. telegraph transmitter

Circuit arrangement for line synchronization in a television rec

Circuit arrangement for scanning the character elements of chara

Circuit arrangement for synchronizing a television receiver

Circuit arrangement for the phase control of a clock signal

Circuit arrangement for varying the phase of a reference signal

Clock extraction device for double-binary phase-shift keying sys

Clock phasing circuit

Clock regenerator comprising a reversible shift register and a c

Clock signal and auxiliary signal transmission system

Code transmission system having buffers of approximately equal c

Combined data input and test circuit

Correlative timing recovery in digital data transmission systems