Clock extraction device for double-binary phase-shift keying sys

Details Clock extraction device for double-binary phase-shift keying sys Clock extraction device for double-binary phase-shift keying sys

1977-05-19

1979-06-12

Griffin, Robert L.

Telegraphy

Systems

Line-clearing and circuit maintenance

178 88, 325344, 325351, 329110, 178 67, H04B 106

Patent

active

041581059

ABSTRACT:
A circuit for extracting a clock signal from a double-binary phase-shift keying system is disclosed. The carrier wave form is regenerated at the receiver from the phase-shift keyed (PSK) signal input. The regenerated carrier wave is frequency doubled and frequency mixed with the PSK input signal which has also been frequency doubled. A desired clock signal is thereafter extracted from the mixed signal by a band-pass filter. The system does not include a frequency divider which would result in a phase ambiguity.

REFERENCES:
patent: B498775 (1976-03-01), Balcewicz
patent: 3745458 (1973-07-01), Nakamura
patent: 3753114 (1973-08-01), Burley
patent: 3835404 (1974-09-01), Nakamura
patent: 4015083 (1977-03-01), Bellisio
patent: 4039961 (1977-08-01), Ishio

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