Telegraphy – Systems – Line-clearing and circuit maintenance
Patent
1976-02-13
1977-05-31
Safourek, Benedict V.
Telegraphy
Systems
Line-clearing and circuit maintenance
178 68, H04W 704
Patent
active
040271005
ABSTRACT:
A buffer memory of a transmitter stores, for transmission at a predetermined transmission rate, synchronization codes produced regularly, buffer occupancy codes immediately following the respective synchronization codes, and information codes produced between each buffer occupancy code and the next following synchronization code unevenly in response to information to be transmitted. A buffer memory of a receiver stores the codes transmitted from the transmitter. A decoder, coupled to the receiver buffer memory, decodes the information codes at a decoding rate controlled with reference to the difference between an actual sum of buffer occupancies of both buffer memories and a value predetermined for the sum.
REFERENCES:
patent: 3922494 (1975-11-01), Cooper et al.
patent: 3946161 (1976-03-01), Husted et al.
Nippon Electric Company Ltd.
Safourek Benedict V.
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