Low leakage and leakage tolerant stack free multi-ported...
Low power register apparatus having a two-way gating...
Low power shift register and semiconductor memory device...
Memory architecture and devices, systems and methods utilizing t
Memory architecture and devices, systems and methods utilizing t
Memory circuit containing a chain of stages
Memory circuit containing a chain of stages
Memory data interface
Memory device and method for selectable sub-array activation
Memory device and method for selectable sub-array activation
Method and circuit for elastic storing capable of adapting...
Method and circuit for elastic storing capable of adapting...
Method and circuit for processing output data in pipelined...
Method for programming permanent calibration information at fina
Method of and apparatus for generating variable time delay
Methods and apparatus for improved memory access
Methods and apparatus for improved memory access
Methods and apparatus for improved memory access
Microcomputer and microprocessor having flash memory...
MIS-transistor-based nonvolatile memory for multilevel data...