Low leakage and leakage tolerant stack free multi-ported...

Details Low leakage and leakage tolerant stack free multi-ported... Low leakage and leakage tolerant stack free multi-ported...

2007-04-24

2007-04-24

Phan, Trong (Department: 2827)

Static information storage and retrieval

Read/write circuit

With shift register

C365S230050, C365S203000

Reexamination Certificate

active

10953202

ABSTRACT:
A device includes a number of memory cells. Each of the memory cells includes a transistor stack coupled to a bit line. A value of a charge on the bit line during an access mode represents a value of data stored in an accessed memory cell. During a non-access mode, all transistors of the transistor stack are turned off to save power. The transistors are turn off regardless of the value of the data stored in the memory cells.

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