Low power register apparatus having a two-way gating...

Details Low power register apparatus having a two-way gating... Low power register apparatus having a two-way gating...

2006-04-18

2006-04-18

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

With shift register

C365S189020

Reexamination Certificate

active

07031204

ABSTRACT:
A register apparatus and method for providing a two-way gating structure for receiving a write enable signal, a chip select signal, at least one read signal, and an address signal for a register. The apparatus and method comprise a two-way gating portion for generating a coded write address by AND-operating a first signal with the address signal, a coded read address by AND-operating a second signal with the address signal, and a reader activation signal by AND-operating the read signal with the second signal. The first and second signals are generated by AND-operating the chip select signal with the write enable signal and by AND-operating the chip select signal with an inverted write enable signal. A writer decodes the coded write address and generates write signals using the decoded write address and data received from a bus. A reader decodes the coded read address and generates data using data read from the register and the decoded read address.

REFERENCES:
patent: 6731548 (2004-05-01), Pax

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