Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-01-20
2000-04-25
Thomas, Tom
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438424, 438359, 257622, 257510, 257506, H01L 2160
Patent
active
060543434
ABSTRACT:
A semiconductor device and method having shallow trench isolation. A pad oxide 24 and silicon 42 are formed on a substrate 20 to form a mask, and the pad oxide 24/silicon 42 mask is then patterned. Portions of the pad oxide 24/silicon 42 mask and the substrate 20 are removed to form trenches 22 in the substrate 20. A nitride fill 40 is deposited over the pad oxide 24/silicon 42 mask and the trenches 22. Advantages of the invention include a more robust STI device without central voids 34 and without edge voids 36 in the trench fill material.
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Brady III Wade James
Garner Jacquline J.
Owens Douglas W.
Telecky Jr. Frederick J.
Texas Instruments Incorporated
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