Method of forming CMOS circuitry

Details Method of forming CMOS circuitry Method of forming CMOS circuitry

1997-12-02

1999-06-01

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438233, 438548, 438564, 438675, H01L 218238

Patent

active

059096160

ABSTRACT:
A method of forming a field effect transistor includes, a) providing a gate over a semiconductor substrate, the gate having a thickness; b) providing an insulating dielectric layer over the gate, the insulating dielectric layer being provided to a thickness which is greater than the gate thickness to provide an outer dielectric layer surface which is above the gate; c) patterning and etching the insulating dielectric layer to provide openings therethrough to the substrate to define and expose active area adjacent the gate for formation of one of PMOS type or NMOS type diffusion regions; d) providing a layer of conductive material over the insulating dielectric layer and within the openings; e) providing the one of PMOS or NMOS type diffusion regions within the substrate relative to the first openings; and f) etching back the conductive layer to define electrically conductive projections which are isolated from one another within the openings. The method has specific applicability to CMOS fabrication, and provision of overlying and differently conductively doped polysilicon layers which are chemical-mechanical polished in a common step.

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