Method of fabricating power semiconductor device using semi-insu

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438282, 438283, H01L 21336

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active

060402199

ABSTRACT:
A method for manufacturing a power semiconductor device including a semi-insulating polycrystalline silicon (SIPOS) film is provided. According to this method, first, a conductive collector region is formed in a semiconductor substrate. Then, a first insulating film, which exposes a portion of the semiconductor substrate in which a base region is to be formed, is formed on said semiconductor substrate in which the collector region is formed. A conductive base region is formed in the collector region. A second insulating film is formed over the entire surface of the semiconductor substrate. After exposing a portion of the semiconductor substrate in which an emitter region and a channel stop region are to be formed, impurities for the emitter region are implanted into the base region. Simultaneously, a third insulating film is formed over the entire surface of the semiconductor substrate, while a conductive emitter region is formed by diffusing the impurities. At least one of the first to third insulating films is left only in a field region between the base region and the channel stop region. Parts of the base region, the emitter region, and the channel stop region are exposed after forming a semi-insulating polycrystalline silicon (SIPOS) film on the entire surface of the resultant structure. A base electrode, an emitter electrode, and an equipotential metal ring are then formed, respectively contacting the base region, the emitter region, and the channel stop region.

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