Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-07-13
2010-12-07
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S270000, C438S525000, C257SE21410
Reexamination Certificate
active
07846798
ABSTRACT:
The invention includes methods in which an angled implant is utilized to self-align a source/drain region implant with the top edge of a gateline of a vertical transistor structure. The invention also includes methods in which an angled implant is utilized to implant dopant beneath the gateline of a vertical transistor structure. Vertical transistor structures formed in accordance with methodology of the present invention can be incorporated into various types of integrated circuitry, including, for example, DRAM arrays.
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Basceri Cem
Manning H. Montgomery
Parekh Kunal R.
Sandhu Gurtej S.
Micro)n Technology, Inc.
Trinh Michael
Wells St. John P.S.
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