Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2009-12-16
2010-12-07
Hoang, Quoc D (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C257SE21503
Reexamination Certificate
active
07846769
ABSTRACT:
A method includes joining an integrated circuit die having at least one low-k dielectric layer to a package substrate or printed circuit board using a plurality of solder bumps located between the die and the package substrate or printed circuit board. The low-k dielectric layer has a dielectric constant of about 3.0 or less. The solder bumps have a lead concentration of about 5% or less. A stratified underfill is formed between the die and the package substrate or printed circuit board.
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Karta Tjandra Winata
Lee Chien-Hsiun
Lii Mirng-Ji
Lu Szu-Wei
Duane Morris LLP
Hoang Quoc D
Koffs Steven E.
Taiwan Semiconductor Manufacturing Co. Ltd.
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