Method and system for correcting a mask pattern design

Details Method and system for correcting a mask pattern design Method and system for correcting a mask pattern design

2004-12-16

2009-08-04

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C430S005000, C430S030000

Reexamination Certificate

active

07571417

ABSTRACT:
A pattern verification method includes preparing a desired pattern and a mask pattern forming the desired pattern on a substrate, defining at least one evaluation point on an edge of the desired pattern, defining at least one process parameter to compute the transferred/formed pattern, defining a reference value and a variable range for each of the process parameters, and computing a positional displacement for each first points corresponding to the evaluation point, first points computed using correction mask pattern and a plurality of combinations of parameter values obtained by varying the process parameters within the variable range or within the respective variable ranges. The positional displacement is a displacement between first point and the evaluation point. The method further includes computing a statistics of the positional displacements for each of the evaluation points, and outputting information modifying the mask pattern according to the statistics.

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Newmark, D. M. et al., “Large Area Optical Proximity Correction Using Pattern Based Corrections”, SPIE, vol. 2322, Photomask Technology and Management, pp. 374-386, (1994).
Notification of Reasons for Rejection issued by the Japanese Patent Office on Apr. 1, 2008, for Japanese Patent Application No. 2003-421349, and English-language translation thereof.

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