Method of manufacturing dynamic random access memory

Details Method of manufacturing dynamic random access memory Method of manufacturing dynamic random access memory

2007-06-22

2009-12-22

Lindsay, Jr., Walter L (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21646, C257SE21658

Reexamination Certificate

active

07635626

ABSTRACT:
A method of manufacturing a DRAM includes firstly providing a substrate. Many transistors are then formed on the substrate. Next, a first and a second LPCs are formed between the transistors. A first dielectric layer is then formed on the substrate, and a first opening exposing the first LPC is formed in the first dielectric layer. Thereafter, a barrier layer is formed on the first dielectric layer. Afterwards, a BLC is formed in the first opening, and a BL is formed on the first dielectric layer. A liner layer is then formed on a sidewall of the BL. Next, a second dielectric layer having a dry etching rate substantially equal to that of the liner layer and having a wet etching rate larger than that of the liner layer is formed on the substrate. Finally, an SNC is formed in the first and the second dielectric layers.

REFERENCES:
patent: 2005/0012128 (2005-01-01), Bae
patent: 2006/0205141 (2006-09-01), Park et al.

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