Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-05-02
2009-12-29
Coleman, W. David (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S420000, C257S544000, C257SE29019, C257SE21544
Reexamination Certificate
active
07638385
ABSTRACT:
A method of forming a semiconductor device includes forming isolation trenches that are used to isolate some of the electrical elements such as transistors, diodes, capacitors, or resistors on a semiconductor die from other elements on the semiconductor die.
REFERENCES:
patent: 4090254 (1978-05-01), Ho et al.
patent: 4313255 (1982-02-01), Shinozaki et al.
patent: 4574469 (1986-03-01), Mastroianni et al.
patent: 4663831 (1987-05-01), Birrittella et al.
patent: 4696097 (1987-09-01), McLaughlin et al.
patent: 5057895 (1991-10-01), Beasom
patent: 5177576 (1993-01-01), Kimura et al.
patent: 5196373 (1993-03-01), Beasom
patent: 5283461 (1994-02-01), Beasom
patent: 5789776 (1998-08-01), Lancaster et al.
patent: 6025225 (2000-02-01), Forbes et al.
patent: 6133116 (2000-10-01), Kim et al.
patent: 6326253 (2001-12-01), Kotani
patent: 6686634 (2004-02-01), Ishio
patent: 6943413 (2005-09-01), Lee
patent: 7041572 (2006-05-01), Yang et al.
patent: 7176524 (2007-02-01), Loechelt et al.
patent: 7186609 (2007-03-01), Korec et al.
patent: 7253477 (2007-08-01), Loechelt et al.
patent: 7285823 (2007-10-01), Loechelt et al.
patent: 2001/0012655 (2001-08-01), Nordstom et al.
patent: 2004/0018705 (2004-01-01), Colson et al.
patent: 2004/0259318 (2004-12-01), Williams et al.
patent: 2005/0020003 (2005-01-01), Johansson et al.
patent: 2005/0173727 (2005-08-01), Manna et al.
patent: 2007/0034947 (2007-02-01), Loechelt et al.
“Characterization of Trench Isolation for BiCMOS Technologies”, Klootwijk et al, Philips Research Laboratories Eindhoven, ICMTS, 0-7803-6275-6-3/00, copyright 2000 IEEE, pp. 00-200-00-204.
“Characteristics of a New Isolated p-Well Structure Using Thin Epitaxy Over the Buried Layer and Trench Isolation,” Okazaki et al, IEEE Transactions on Electron Devices, vol. 39, No. 12, Dec. 1992, pp. 2758-2764.
Dow Diann
Grivna Gordon M.
Zdebel Peter J.
Coleman W. David
Hightower Robert F.
Malek Maliheh
Semiconductor Components Industries LLC
LandOfFree
Method of forming a semiconductor device and structure therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a semiconductor device and structure therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a semiconductor device and structure therefor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4095024