Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-08-18
2008-08-26
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07418693
ABSTRACT:
Systems, methodologies and technologies for the analysis and transformation of integrated circuit layouts using situations are disclosed. A method for transforming an integrated circuit (IC) layout includes recognizing shapes within the IC layout, identifying features for each of the shapes and extracting situations for the respective features. Extracted situations can be used to improve optical proximity correction (OPC) of the IC layout. This improved OPC includes extracting the situations, simulating the situations to determine a set of the situations identified for modification based on failing to satisfy a desired OPC tolerance level, modifying the set of situations to improve satisfaction of the desired OPC tolerance level, and reintegrating the modified set of situations into the IC layout. Extracted situations can also be used to improve aerial image simulation of the IC layout. This improved aerial image simulation includes extracting the situations, simulating a subset of the situations to determine aerial images of the subset, and tiling the subset of situations to form a larger aerial image. Extracted situations can further be used to improve density analysis of the IC layout. This improved density analysis includes extracting the situations for a window of the IC layout, removing overlap from the window based on the extracted situations, calculating a density for each of the situations, and calculating a density for the window based on the density for each of the situations.
REFERENCES:
patent: 6044007 (2000-03-01), Capodieci
patent: 6057249 (2000-05-01), Chen
patent: 2003/0103189 (2003-06-01), Neureuther et al.
patent: 2003/0118917 (2003-06-01), Zhang et al.
patent: 2007/0077504 (2007-04-01), Park
Gennari Frank E.
Lai Ya-Chieh
Lam Michael C.
McIntyre Gregory R.
Moskewicz Matthew W.
Cadence Design Systems Inc.
Dimyan Magid Y
Siek Vuthe
Vista IP Law Group LLP
LandOfFree
System and method for analysis and transformation of layouts... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for analysis and transformation of layouts..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for analysis and transformation of layouts... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4010644