Methods of forming a recessed gate

Details Methods of forming a recessed gate Methods of forming a recessed gate

2006-09-18

2008-10-07

Wilczewski, M. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S589000, C438S592000

Reexamination Certificate

active

07432155

ABSTRACT:
A method of forming a recessed gate may include forming a gate recess including an upper recess and a lower recess at an upper portion of a semiconductor substrate, the lower recess may have a width substantially wider than that of the upper recess, forming a gate insulation layer on an inner surface of the gate recess, forming a first silicon layer on the semiconductor substrate including the gate insulation layer to form an open void within the gate recess, forming a stop layer having a high thermal resistance on the first silicon layer to prevent a void from moving around within the gate recess, forming a second silicon layer on the first silicon layer, and patterning the second and the first silicon layers to form a gate electrode.

REFERENCES:
patent: 6939765 (2005-09-01), Kim et al.
patent: 2003/0102500 (2003-06-01), Cross
patent: 2006/0289931 (2006-12-01), Kim et al.
patent: 2007/0059889 (2007-03-01), Yoo et al.
patent: 2007/0077713 (2007-04-01), Ha et al.
patent: 2003-023104 (2003-01-01), None
patent: 10-2004-0079518 (2004-09-01), None
patent: 10-2005-0007637 (2005-01-01), None

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