Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-27
2008-03-18
Malsawma, Lex (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21179
Reexamination Certificate
active
07344944
ABSTRACT:
A non-volatile memory device comprises a gate line that includes a gate dielectric layer, a bottom gate pattern, an inter-gate dielectric and a top gate pattern, which are sequentially stacked. The width of the inter-gate dielectric is narrower than that of the bottom gate pattern.
REFERENCES:
patent: 4780431 (1988-10-01), Maggioni
patent: 5894146 (1999-04-01), Pio et al.
patent: 6221717 (2001-04-01), Cremonesi et al.
patent: 6541324 (2003-04-01), Wang
patent: 1345466 (2002-04-01), None
Chang Sung-Nam
Park Kyu-Charn
Shin Kwang-Shik
Malsawma Lex
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
LandOfFree
Non-volatile memory device and fabricating method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile memory device and fabricating method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile memory device and fabricating method thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3974411